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vishay siliconix dg9408, dg9409 document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 precision 8-ch/dual 4-ch lo w voltage analog multiplexers description the dg9408, dg9409 uses bicmos wafer fabrication technology that allows the dg9408, dg9409 to operate on single and dual supplies. single supply voltage ranges from 3 v to 12 v while dual supply operation is recommended with 3 v to 6 v. the dg9408 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (a 0 , a 1 , a 2 ). the dg9409 is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (a 0 , a 1 ). break-before-make switching action to protect against momentary crosstalk between adjacent channels. as a committed partner to the community and the environment, vishay siliconix manufactures this product with lead (pb)-free device terminations. the dg9408, dg9409 are offered in a qfn package that has a nickel-palladium- gold device terminations and is represented by the lead (pb)-free ?-e4? suffix. the nickel-palladium-gold device terminations meet all the jedec standards for reflow and msl ratings. features ? halogen-free according to iec 61249-2-21 definition ? 2 . 7 v t o 1 2 v s i n g l e s u p p l y o r 3 v t o 6 v dual supply operation ? low on-resistance - r on : 3.9 ? typ. ? fast switching: t on - 42 ns, t off - 24 ns ? break-before-make guaranteed ? low leakage ? ttl, cmos, lv logic (3 v) compatible ? 2000 v esd protection (hbm) ? compliant to rohs directive 2002/95/ec benefits ? high accuracy ? single and dual power rail capacity ? wide operating voltage range ? simple logic interface applications ? data acquisition systems ? battery operated equipment ? portable test equipment ? sample and hold circuits ? communication systems ? sdsl, dslam ? audio and video signal routing functional block diagram and pin configuration 49 gnd s 2a s 4b s 3b s 3a en s 2b s 1a 1 2 3 12 11 10 5678 16 15 14 13 a 0 v+ a 1 s 4a s 1b d b v- d a decoder/driver to p view dg9409 qfn16 gnd s 6 s 4 s 3 s 7 en s 2 s 5 1 2 3 12 11 10 49 5678 16 15 14 13 a 0 v+ a 1 s 8 s 1 a 2 v- d decoder/driver to p view dg9408 qfn16
www.vishay.com 2 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 truth tables and ordering information x = don?t care for low and high voltage levels for v ax and v en consult ?digital control? parameters for specific v+ operation. see specifications tables for: single supply 12 v dual supply v+ = 5 v, v- = - 5 v single supply 5 v single supply 3 v notes: a. signals on sx, dx or inx exceeding v+ or v- will be clamped by internal diodes. limit forward diode current to maximum curren t ratings. b. all leads soldered or welded to pc board. c. derate 23.5 mw/c above 70 c. d. manual soldering with soldering iron is not recommended for l eadless components. the qfn is a leadless package. the end of th e lead terminal is exposed copper (not plated) as a result of the si ngulation process in manufacturing. a solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. truth table dg9408 a 2 a 1 a 0 en on switch x x x 1 none 00 0 0 1 00 1 0 2 01 0 0 3 01 1 0 4 10 0 0 5 10 1 0 6 11 0 0 7 11 1 0 8 truth table dg9409 a 1 a 0 en on switch x x 1 none 00 0 1 01 0 2 10 0 3 11 0 4 ordering information temp. range package part number - 40 c to 85 c 16-pin qfn (4 mm x 4 mm) dg9408dn-t1-e4 dg9409dn-t1-e4 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter limit unit voltage referenced v+ to v- 14 v gnd 7 digital inputs a , v s , v d (v-) - 0.3 to (v+) + 0.3 current (any terminal except s or d) 30 ma continuous current, s or d 100 peak current, s or d (pulsed at 1 ms, 10 % duty cycle max.) 200 package solder reflow conditions d 16-pin (4 x 4 mm) qfn 240 c storage temperature - 65 to 150 power dissipation (package) b , (t a = 70 c) 16-pin (4 x 4 mm) qfn c 1880 mw
document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 3 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications (single supply 12 v) parameter symbol test conditions unless otherwise specified v+ = 12 v, 10 % , v- = 0 v v a , v en = 0.8 v or 2.4 v f temp. b limits - 40 c to 85 c unit min. c typ. d max. c analog switch analog signal range e v analog full 0 12 v on-resistance r on v+ = 10.8 v, v d = 2 v or 9 v, i s = 50 ma sequence each switch on room full 47 7.5 ? r on match between channels g ? r on v+ = 10.8 v, v d = 2 v or 9 v, i s = 50 ma room 3.6 on-resistance flatness i r on flatness room 8 switch off leakage current i s(off) v en = 2.4 v, v d = 11 v or 1 v, v s = 1 v or 11 v room full - 2 - 15 2 15 na i d(off) room full - 2 - 15 2 15 channel on leakage current i d(on) v en = 0 v, v s = v d = 1 v or 11 v room full - 2 - 15 2 15 digital control logic high input voltage v inh full 2.4 v logic low input voltage v inl full 0.8 input current i in v ax = v en = 2.4 v or 0.8 v full - 1 1 a dynamic characteristics transition time t trans v s1 = 8 v, v s8 = 0 v, (dg9408) v s1b = 8 v, v s4b = 0 v, (dg9409) see fig. 2 room full 42 71 75 ns break-before-make time t bbm v s(all) = v da = 5 v see fig. 4 room full 224 enable turn-on time t on(en ) v ax = 0 v, v s1 = 5 v (dg9408) v ax = 0 v, v s1b = 5 v (dg9409) see fig. 3 room full 42 70 75 enable turn-off time t off(en ) room full 24 44 46 charge injection e q c l = 1 nf, v gen = 0 v, r gen = 0 ? room 29 pc off isolation e, h oirr f = 100 khz, r l = 1 k ? room - 80 db crosstalk e x ta l k room - 85 source off capacitance e c s(off) f = 1 mhz, v s = 0 v, v en = 2.4 v dg9408 room 21 pf dg9409 room 23 drain off capacitance e c d(off) f = 1 mhz, v d = 0 v, v en = 2.4 v dg9408 room 211 dg9409 room 112 drain on capacitance e c d(on) f = 1 mhz, v d = 0 v, v en = 0 v dg9408 room 238 dg9409 room 137 power supplies power supply current i+ v en = v a = 0 v or v+ room 1 a
www.vishay.com 4 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications (dual supply v+ = 5 v, v- = - 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = - 5 v, 10 % v a , v en = 0.8 v or 2 v f temp. b limits - 40 c to 85 c unit min. c typ. d max. c analog switch analog signal range e v analog full - 5 5 v on-resistance r on v+ = 4.5 v, v- = - 4.5 v, v d = 3.5 v, i s = 50 ma sequence each switch on room full 58 8.5 ? r on match between channels g ? r on v+ = 4.5 v, v- = - 4.5 v, v d = 3.5 v, i s = 50 ma room 3.6 on-resistance flatness i r on flatness room 8.2 switch off leakage current a i s(off) v+ = 5.5 , v- = - 5.5 v v en = 2.4 v, v d = 4.5 v, v s = 4.5 v room full - 2 - 15 2 15 na i d(off) room full - 2 - 15 2 15 channel on leakage current a i d(on) v+ = 5.5 v, v- = - 5.5 v v en = 0 v, v d = 4.5 v, v s = 4.5 v room full - 2 - 15 2 15 digital control logic high input voltage v inh full 2 v logic low input voltage v inl full 0.8 input current a i in v ax = v en = 2 v or 0.8 v full - 1 1 a dynamic characteristics transition time e t trans v s1 = 3.5 v, v s8 = - 3.5 v, (dg9408) v s1b = 3.5 v, v s4b = - 3.5 v, (dg9409) see fig. 2 room full 68 89 94 ns break-before-make time e t bbm v s(all) = v da = 3.5 v see fig. 4 room full 116 enable turn-on time e t on(en ) v ax = 0 v, v s1 = 3.5 v (dg9408) v ax = 0 v, v s1b = 3.5 v (dg9409) see fig. 3 room full 68 88 94 enable turn-off time e t off(en ) room full 58 78 81 source off capacitance e c s(off) f = 1 mhz, v s = 0 v, v en = 2 v dg9408 room 23 pf dg9409 room 23 drain off capacitance e c d(off) f = 1 mhz, v d = 0 v, v en = 2 v dg9408 room 223 dg9409 room 113 drain on capacitance e c d(on) f = 1 mhz, v d = 0 v, v en = 0 v dg9408 room 246 dg9409 room 137 power supplies power supply current i+ v en = v a = 0 v or v+ room 1 a i- room - 1
document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 5 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications (single supply 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, 10 %, v- = 0 v v a , v en = 0.8 v or 2 v f temp. b limits - 40 c to 85 c unit min. c typ. d max. c analog switch analog signal range e v analog full 0 5 v on-resistance r on v+ = 4.5 v, v d or v s = 1 v or 3.5 v, i s = 50 ma room full 710.5 11 ? r on match between channels g ? r on v+ = 4.5 v, v d = 1 v or 3.5 v, i s = 50 ma room 3.6 on-resistance flatness i r on flatness room 9 switch off leakage current a i s(off) v+ = 5.5 v v s = 1 v or 4 v, v d = 4 v or 1 v room full - 2 - 15 2 15 na i d(off) room full - 2 - 15 2 15 channel on leakage current a i d(on) v+ = 5.5 v v d = v s = 1 v or 4 v, sequence each switch on room full - 2 - 15 2 15 digital control logic high input voltage v inh v+ = 5 v full 2 v logic low input voltage v inl full 0.8 input current a i in v ax = v en = 2 v or 0.8 v full - 1 1 a dynamic characteristics transition time e t trans v s1 = 3.5 v, v s8 = 0 v, (dg9408) v s1b = 3.5 v, v s4b = 0 v, (dg9409) see fig. 2 room full 73 94 104 ns break-before-make time e t open v s(all) = v da = 3.5 v see fig. 4 room full 229 enable turn-on time e t on(en ) v ax = 0 v, v s1 = 3.5 v (dg9408) v ax = 0 v, v s1b = 3.5 v (dg9409) see fig. 3 room full 74 94 104 enable turn-off time e t off(en ) room full 38 57 61 charge injection e q c l = 1 nf, r gen = 0 , v gen = 0 v room 20 pc off isolation e, h oirr r l = 1 k ? , f = 100 khz room - 81 db crosstalk e x ta l k room - 85 source off capacitance e c s(off) f = 1 mhz, v s = 0 v, v en = 0 v dg9408 room 22 pf dg9409 room 24 drain off capacitance e c d(off) f = 1 mhz, v d = 0 v, v en = 2 v dg9408 room 223 dg9409 room 113 drain on capacitance e c d(on) f = 1 mhz, v d = 0 v, v en = 0 v dg9408 room 244 dg9409 room 143 power supplies power supply current i+ v en = v a = 0 v or v+ room 1 a
www.vishay.com 6 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. leakage parameters are guaranteed by worst case test condition and not subject to production test. b. room = 25 c, full = as determined by the operating temperature suffix. c. the algebraic convention whereby the most negative value is a minimum and the most po sitive a maximum, is used in this data sheet. d. typical values are for design aid only, not guaranteed nor subject to production testing. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function. g. ? r don = r don max - r don min. h. worst case isolation occurs on c hannel 4 due to proximity to the drain pin. i. r don flatness is measured as t he difference between the minimum and maximum m easured values across a defined analog signal. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications (single supply 3 v) parameter symbol test conditions unless otherwise specified v+ = 3 v, 10 % , v- = 0 v v en = 0.4 v or 1.8 v f temp. b limits - 40 c to 85 c unit min. c typ. d max. c analog switch analog signal range e v analog full 0 3 v on-resistance r on v+ = 2.7 v, v d = 0.5 v or 2.2 v, i s = 5 ma room full 12 25.5 26.5 ? r on match between channels g ? r on v+ = 2.7 v, v d = 0.5 v or 2.2 v, i s = 5 ma room 3.6 on- resistance flatness i r on flatness room 13 switch off leakage current a i s(off) v+ = 3.3 v v s = 2 v or 1 v, v d = 1 or 2 v room full - 2 - 15 2 15 na i d(off) room full - 2 - 15 2 15 channel on leakage current a i d(on) v+ = 3.3 v v d = v s = 1 v or 2 v, sequence each switch on room full - 2 - 15 2 15 digital control logic high input voltage v inh full 1.8 v logic low input voltage v inl full 0.4 input current a i in v ax = v en = 1.8 v or 0.4 v full - 1 1 a dynamic characteristics transition time t trans v s1 = 1.5 v, v s8 = 0 v, (dg9408) v s1b = 1.5 v, v s4b = 0 v, (dg9409) see fig. 2 room full 140 165 182 ns break-before-make time t bbm v s(all) = v da = 1.5 v see fig. 4 room full 263 enable turn-on time t on(en ) v ax = 0 v, v s1 = 1.5 v (dg9408) v ax = 0 v, v s1b = 1.5 v (dg9409) see fig. 3 room full 140 162 178 enable turn-off time t off(en ) room full 76 97 104 charge injection e q c l = 1 nf, r gen = 0 , v gen = 0 v room 7 pc off isolation e, h oirr f = 100 khz, r l = 1 k ? room - 81 db crosstalk e x ta l k room - 85 source off capacitance e c s(off) f = 1 mhz, v s = 0 v, v en = 1.8 v dg9408 room 23 pf dg9409 room 25 drain off capacitance e c d(off) f = 1 mhz, v d = 0 v, v en = 1.8 v dg9408 room 230 dg9409 room 120 drain on capacitance e c d(on) f = 1 mhz, v d = 0 v, v en = 0 v dg9408 room 256 dg9409 room 147 power supplies power supply current i+ v en = v a = 0 v or v+ room 1 a
document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 7 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) r on vs. v com and single supply voltage r on vs. analog voltage and temperature leakage current vs. analog voltage 0 2 4 6 8 10 12 14 16 0369 v+ = 3.0 v i s = 5 ma v com - analog voltage (v) - on-resistance ( ? ) r on t = 25 c v+ = 5.0 v i s = 50 ma v+ = 12.0 v i s = 50 ma 12 0 2 4 6 8 10 12 - 5- 3- 1 1 3 5 v = 5 v i s = 50 ma v com - analog voltage (v) - on-resistance ( ? ) r on a = 85 c b = 25 c c = - 40 c a b c - 500 - 400 - 300 - 200 - 100 0 100 024681012 v com , v no , v nc - analog voltage leakage current (pa) v+ = 12 v v- = 0 v i com(on) i no(off) /i nc(off) i com(off) r on vs. analog voltage and temperature supply current vs. temperature leakage current vs. analog voltage 0 2 4 6 8 10 12 14 16 024681012 a b c a = 85 c b = 25 c c = - 40 c - on-resistance ( ? ) r on v com - analog voltage (v) v+ = 12.0 v i s = 50 ma a b c v+ = 5.0 v i s = 50 ma a b c v+ = 3.0 v i s = 5 ma 1 10 100 1000 10 000 - 60 - 40 - 20 0 20 40 60 80 100 temperature ( c) i+ - supply current (pa) v ax , v en = 0 v v+ = 5 v v- = - 5 v v+ = 12 v v- = 0 v - 120 - 100 - 80 - 60 - 40 - 20 0 20 - 5- 3- 1 1 3 5 v com , v no , v nc - analog voltage leakage current (pa) v+ = 5 v v- = - 5 v i com(on) i no(off) /i nc(off) i com(off)
www.vishay.com 8 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) switching time vs. temperature and single supply voltage leakage current vs. temperature insertion loss, off isolation and crosstalk vs. frequency (dg9408) 0 20 40 60 80 100 120 140 160 - 60 - 40 - 20 0 20 40 60 80 100 t on v+ = 3 v t off v+ = 3 v temperature ( c) t on v+ = 5 v t on v+ = 12 v t off v+ = 5 v t off v+ = 12 v - 60 - 40 - 20 0 20 40 60 80 100 10 000 100 1 v+ = 5 v v- = - 5 v leakage current (pa) i com(on) temperature ( c) 10 i com(off) 1000 i no(off) , i nc(off) 100k - 90 1m - 20 10 - 50 - 40 100m 1g frequency (hz) - 70 oirr crosstalk insertion loss 10m 0 - 80 - 60 - 30 - 10 v+ = 12 v v- = 0 v r l (db) loss, oirr, x talk transition time vs. temperature and single supply voltage switching threshold vs. supply voltage insertion loss, off isolation and crosstalk vs. frequency (dg9409) 0 30 60 90 120 150 180 - 60 - 40 - 20 0 20 40 60 80 100 temperature ( c) transistion time (ns) t trans+ v+ = 3 v t trans- v+ = 5 v t trans+ v+ = 5 v t trans- v+ = 3 v t trans- v+ = 12 v t trans+ v+ = 12 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 2468101214 v+ - supply voltage (v) - switching threshold (v) v t - 90 - 80 100k 1m - 20 10 - 50 - 40 100m 1g frequency (hz) - 70 crosstalk 10m 0 - 60 - 30 - 10 insertion loss oirr v+ = 12 v v- = 0 v r l (db) loss, oirr, x talk
document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 9 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) schematic diagram (typical channel) supply current vs. input switching frequency input switching frequency (hz) i+ - supply current (a) v+ = 5 v v- = - 5 v 100 m 10 m 1 m 100 10 1 100 n 10 n 1 n 10 100 1k 10k 100k 1m 10m figure 1. en a 0 s 1 d v+ s n v- decode/ drive level shift v- v+ a x v+ gnd
www.vishay.com 10 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits figure 2. transition time a 1 a 0 a 2 a 1 a 0 v+ v- v+ v- gnd d 35 pf v o s 1 s 2 - s 7 s 8 50 ? 300 ? v s8 v s1 v+ v- v+ v- gnd 35 pf v o s 1b s 1a - s 4a , d a s 4b 300 ? d b logic input switch output v s8 v o t trans t r < 5 ns t f < 5 ns s 8 on (dg9408) or s 4 on (dg9409) s 1 on t trans 50 % v s1 50 % 90 % 90 % 3 v 0 v dg9408 dg9409 v s4b v s1b v ax 50 ? en en return to specifications: single supply 12 v dual supply v+ = 5 v, v- = - 5 v single supply 5 v sin g le suppl y 3 v figure 3. enable switching time logic input switch output v o t r < 5 ns t f < 5 ns 3 v 0 v 0 v t on(en ) t off(en ) 50 % 90 % 90 % v o s 1 s 2 - s 8 a 0 a 1 a 2 50 ? 300 ? v o v+ gnd v- d 35 pf v- v+ s 1b s 1a - s 4a , d a s 2b - s 4b d b a 0 a 1 50 ? 300 ? v o v+ gnd v- 35 pf v- dg9408 dg9409 v s1 v+ v s1 en en return to specifications: single supply 12 v dual supply v+ = 5 v, v- = - 5 v single supply 5 v single supply 3 v
document number: 71870 s11-1229-rev. c, 20-jun-11 www.vishay.com 11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits figure 4. break-before-make interval 50 % 90 % logic input switch output v o v s t open t r < 5 ns t f < 5 ns 0 v 3 v 0 v v+ gnd v- 35 pf v- a 2 d b , d all s and d a 300 ? v o 50 ? a 1 a 0 dg9408 dg9409 v s1 en return to specifications: single supply 12 v dual supply v+ = 5 v, v- = - 5 v single supply 5 v sin g le su pp l y 3 v figure 5. charge injection a 0 a 1 a 2 v o v+ gnd v- d v g r g s x c l 1 nf channel select 3 v 0 v off on logic input switch output ? v o ? v o is the measured voltage due to charge transfer error q, when the channel turns off. q = c l x ? v o off v+ v- en figure 6. off isolation r l 50 ? v ou t v+ gnd v- a 2 d a 1 a 0 s 8 s x r g = 50 ? off isolation = 20 log v out v in v in v+ v- en
www.vishay.com 12 document number: 71870 s11-1229-rev. c, 20-jun-11 vishay siliconix dg9408, dg9409 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71870 . figure 7. crosstalk r l 50 ? v out v+ gnd v- a 2 d a 1 a 0 s 8 s x r g = 50 ? crosstalk = 20 log v out v in v in s 1 v+ v- en r in 50 ? figure 8. insertion loss r l 50 ? a 2 v out d r g = 50 ? insertion loss = 20 log v out a 1 v in a 0 v in s 1 v+ gnd v- v- v+ en figure 9. source drain capacitance f = 1 mhz s 1 d gnd v+ v- meter hp4192a impedance analyzer or equivalent s 8 a 1 a 2 a 0 channel select v- v+ en
terminal tip 5 index area (d 2 e 2) exposed pad 8 -b- d d/2 e/2 -a- e c aaa 2 x top view aa1 a3 -c- seating plane side view bb dd aa cc detail a c 0.08 nx 9 c ccc // d2 d2/2 detail b (ne-1) x e 6 n l e2/2 e2 detail a 2 1 n-1 n (nd-1) x e 8 bottom view c bbb m a b n b 5 datum a or b n r e terminal tip 5 even terminal/side odd terminal/side detail b e e/2 4 c aaa 2 x package information vishay siliconix document number: 71921 19-aug-02 www.vishay.com 1 qfn?16 (4 4 mm) jedec part number: mo-220
notes: 1. dimensioning and tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. all angels are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 iden tifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a molded or marked feature. the x and y dimens ion will vary according to lead counts. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from the terminal tip. 6. nd and ne refer to the number of terminals on the d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. variation hhd is shown for illustration only. 9. coplanarity applies to the exposed heat sink slug as well as the terminals. package information vishay siliconix www.vishay.com 2 document number: 71921 19-aug-02 qfn?16 (4 4 mm) jedec part number: mo-220 millimeters* inches dim min nom max min nom max notes a 0.80 0.90 1.00 0.0315 0.0354 0.0394 a1 0 0.02 0.05 0 0.0008 0.0020 a3 - 0.20 ref - - 0.0079 - aa - 0.345 - - 0.0136 - aaa - 0.25 - - 0.0098 - bb - 0.345 - - 0.0136 - b 0.23 0.30 0.38 0.0091 0.0118 0.0150 5 bbb - 0.10 - - 0.0039 - cc - 0.18 - - 0.0071 - ccc - 0.10 - - 0.0039 - d 4.00 bsc 0.1575 bsc d2 2.00 2.15 2.25 0.0787 0.0846 0.0886 dd - 0.18 - - 0.0071 - e 4.00 bsc 0.1575 bsc e2 2.00 2.15 2.25 0.0787 0.0846 0.0886 e 0.65 bsc 0.0256 bsc l 0.45 0.55 0.65 0.0177 0.0217 0.0256 n 16 16 3, 7 nd - 4 - - 4 - 6 ne - 4 - - 4 - 6 r b(min)/2 - - b(min)/2 - - * use millimeters as the primary measurement. ecn: s-21437?rev. a, 19-aug-02 dwg: 5890
vishay siliconix an505 document number: 74976 19-apr-07 www.vishay.com 1 recommended minimum pads for qfn-16 (4 x 4 mm body) note: qfn-16 (4 x 4) has an exposed center pad that must not come into contact with any metalized structure on the pcb. this area is considered a keep out zone. inches millimeters c1 0.142 3.60 c2 0.142 3.60 e 0.026 0.65 x1 0.014 0.35 x2 0.089 2.25 y1 0.037 0.95 y2 0.089 2.25 1 2 3 4 12 11 10 9 16 15 14 1 3 5 6 7 8 keep o u t zone c1 x2 x1 e y1 c2 y2
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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